Serially addressed integrated circuit memory devices are well known in the art. See, for example, U.S. Pat. Nos. 5,663,922 and 6,097,657. As shown in U.S. Pat. No. 5,663,922, it is well known in the art to “manage” the reading of the memory device. The shortcoming of U.S. Pat. No. 5,663,922 is that it does not address the problem of saving power; the '922 patent activates all of the sense amplifiers as the address is received and is decoded. As a result, the '922 patent does not teach an integrated circuit memory device with power saving during the read mode as its consideration.
Similarly, U.S. Pat. No. 6,097,657 also does not teach saving power in the read mode to efficiently manage the reading of the device.
Accordingly, there is a need for an integrated circuit memory device that manages or controls the power during the read mode in a serially outputted integrated circuit memory device.